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| SM8703CV Clock Generator for DVD Players OVERVIEW The SM8703CV is a 27MHz master clock, 5-system output clock generator for DVD players. It has 2 built-in PLLs that, with the addition of a single crystal oscillator element, can generate 384fs, 512fs and 768fs clocks which are necessary for MPEG2 systems, plus independent fixed-frequency 27MHz and 33.8688MHz output clocks. Each output has an output disable function, when the output is not used, to suppress unwanted radiation. Also, the normal output frequency ratio between each output is maintained so that the visual and audio signals remain synchronized. Supported sampling frequencies (fs) include 44.1 and 48kHz. FEATURES I I PINOUT (Top view) I I I I I 27MHz master clock (internal PLL reference clock) Generated clocks * 27MHz output * 33.8688MHz output * 384fs output * 512fs output * 768fs output Sampling frequency fs * 44.1/48kHz Output disable function Low jitter output: 100ps (typ, 15pF load) Supply voltage: 3.3V 24-pin VSOP package APPLICATIONS I I I VDD VSS MO1 MCK MLEN VDDA VSSA XTI XTO RSV RSV SO1 1 24 12 13 MO2 FSEL/MDT SO5 RSV SO2 VDD1 VSS1 RSV SO3 SO4 VDD2 VSS2 DVD players Set-top boxes MPEG2 systems PACKAGE DIMENSIONS (Unit: mm) Weight: 0.1g ORDERING INFORMATION Device SM8703CV Package 24-pin VSOP 7.8 0.1 + 0.05 0.15 - 0.02 5.6 0.1 7.6 0.2 + 0.2 1.25 - 0.1 0 to 10 0.65 + 0.1 0.22 - 0.05 0.1 0.13 M SEIKO NPC CORPORATION --1 0.1 0.1 0.5 0.2 SM8703CV BLOCK DIAGRAM FSEL/MDT MCK MLEN External Interface Phase Comparator0 Divider0 XTI Oscillator XTO Charge Pump0 SO5 LPF0 VCO0 SO4 Divider0 Divider SO3 SO2 Divider1 Phase Comparator1 Charge Pump1 LPF1 VCO1 SO1 Divider1 MO1 MO2 SEIKO NPC CORPORATION --2 SM8703CV PIN DESCRIPTION Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 Name VDD VSS MO1 MCK MLEN VDDA VSSA XTI XTO RSV RSV SO1 VSS2 VDD2 SO4 SO3 RSV VSS1 VDD1 SO2 RSV SO5 FSEL/MDT MO2 I/O - - O Ip1 Ip1 - - I O - - O - - O O - - - O - O Ip1 O Power supply for Digital block VSS for Digital block 27MHz fixed-frequency output 1 Serial interface bit clock input Serial interface latch enable input Power supply for Analog block VSS for Analog block Reference signal crystal oscillator element connection or external clock input Reference signal crystal oscillator element connection Reserved (must be open) Reserved (must be open) 33.8688MHz fixed-frequency output VSS for Output buffer Power supply for Output buffer 512fs output 512fs output Reserved (must be open) VSS for Output buffer Power supply for Output buffer 384fs output Reserved (must be open) 768fs output Parallel mode: Sampling frequency select signal input Serial mode: Control data input 27MHz fixed-frequency output 2 Description 1. Schmitt trigger input with internal pull-up resistor SEIKO NPC CORPORATION --3 SM8703CV SPECIFICATIONS Absolute Maximum Ratings Parameter Supply voltage range Symbol VDDA , VDD , VDD1 , VDD2 VDDA - VDD , VDDA - VDD1 , VDDA - VDD2 , VDD - VDD1 , VDD - VDD2 , VDD1 - VDD2 VSSA - VSS , VSSA - VSS1 , VSSA - VSS2 , VSS - VSS1 , VSS - VSS2 , VSS1 - VSS2 VIN VOUT PD Tstg Digital inputs Digital outputs Condition Rating -0.3 to 6.5 Unit V Supply voltage deviation 0.1 V Ground voltage deviation 0.1 V Input voltage range Output voltage range Power dissipation Storage temperature range -0.3 to VDD + 0.3 -0.3 to VDD + 0.3 300 -55 to 125 V V mW C Recommended Operating Conditions Parameter Supply voltage ranges Operating temperature range Symbol VDDA , VDD , VDD1 , VDD2 Topr Condition Rating 3.0 to 3.6 -40 to 85 Unit V C SEIKO NPC CORPORATION --4 SM8703CV DC Electrical Characteristics External clock, Ta = -40 to 85C, VDDA = VDD = VDD1 = VDD2 = 3.0 to 3.6V unless otherwise noted. Rating Parameter Symbol Condition min All supplies. VDDA = VDD = VDD1 = VDD2 = 3.3V, Ta = 25C, fs = 48kHz, Crystal oscillator element, no load on all outputs XTI, FSEL/MDT, MCK, MLEN XTI, FSEL/MDT, MCK, MLEN FSEL/MDT, MCK, MLEN (Note 1) VIN = VDD FSEL/MDT, MCK, MLEN (Note 1) VIN = 0V XTI, VIN = VDD XTI, VIN = 0V All outputs. IOH = -2mA All outputs. IOL = 4mA typ max Unit Current consumption IDD - 32 45 mA HIGH-level input voltage LOW-level input voltage HIGH-level input current LOW-level input current HIGH-level input current LOW-level input current HIGH-level output voltage LOW-level output voltage VIH VIL IIH1 IIL1 IIH2 IIL2 VOH VOL 0.8VDD - - - - - VDD - 0.4 - - - - - - - - - - 0.2VDD 1 -100 40 -40 - 0.4 V V A A A A V V Note 1: Schmitt trigger input with internal pull-up resistor AC Electrical Characteristics External clock, Ta = -40 to 85C, VDDA = VDD = VDD1 = VDD2 = 3.0 to 3.6V unless otherwise noted. Rating Parameter XTI external input clock frequency Output clock rise time Output clock fall time Symbol fM tR tF All outputs, 0.2 to 0.8VDD , CL = 15pF All outputs, 0.8 to 0.2VDD , CL = 15pF All outputs, Standard tolerance, Crystal oscillator element, CL = 15pF All outputs, Crystal oscillator element, CL = 15pF All outputs All outputs Condition min - - - typ 27.0000 2.0 2.0 max - - - MHz ns ns Unit Output clock jitter JITTER - 100 - ps Output clock duty1 Settling time Power-up time2 DUTY tS tP 45 - - 50 - 15 55 100 30 % ns ms 1. 1.4V to 1.4V. Ta = 20C. The characteristics of output clock jitter and output clock duty depends on crystal oscillator. NPC's standard crystal oscillator: R = 10.5, L = 5.38mH, Ca = 6.74fF, Cb = 1.85pF measurement apparatus: HP4195 Load capacitance: C1 = 7pF, C2 = 11pF Cb L Ca R 2. Time from OFF condition to stable frequency output. SEIKO NPC CORPORATION --5 SM8703CV Serial Interface AC Characteristics External clock, Ta = -40 to 85C, VDDA = VDD = VDD1 = VDD2 = 3.0 to 3.6V unless otherwise noted. Rating Parameter MCK HIGH-level pulsewidth MCK LOW-level pulsewidth MCK pulse cycle time MDT setup time MDT hold time MLEN setup time1 MLEN hold time2 MLEN HIGH-level pulsewidth MLEN LOW-level pulsewidth Symbol tMCWH tMCWL tMCY tMDS tMDH tMLS tMLH tMHH tMLL Condition min 40 40 100 40 40 40 40 200 16 x tMCY typ - - - - - - - - - max - - - - - - - - - ns ns ns ns ns ns ns ns ns Unit 1. Time from the MLEN falling edge to the next MCK rising edge. If the MCK clock stops after the LSB, the MLEN rise timing is optional. 2. Time from MCK rising edge corresponding to the LSB to the MLEN rising edge. tMCWH tMCWL MCK tMLH tMLS 0.5VDD tMCY MDT MSB LSB 0.5VDD tMLS MLEN tMDS tMDH tMLL tMHH 0.5VDD SEIKO NPC CORPORATION --6 SM8703CV FUNCTIONAL DESCRIPTION 27MHz Master Clock The 27MHz master clock is generated either by connecting a crystal oscillator element between XTI (pin 8) and XTO (pin 9), as shown in figure 1, or by connecting an external 27MHz clock to XTI, as shown in figure 2. The crystal oscillator element must be used in fundamental frequency mode. C2 XTI (Pin8) Oscillator Internal Circuits C1 C1, C2 = 5 to 33pF XTO (Pin9) MO1 (Pin3) MO2 (Pin24) SM8703CV Figure 1. Crystal oscillator connection External Clock XTI (Pin8) Oscillator Internal Circuits Open XTO (Pin9) MO1 (Pin3) MO2 (Pin24) SM8703CV Figure 2. External clock input SEIKO NPC CORPORATION --7 SM8703CV Sampling Frequency and Output Clock Frequency The SM8703CV generates several output clocks from the 27MHz master clock, with frequencies of 384fs (SO2), 512fs (SO3, SO4) and 768fs (SO5), where fs is the sampling frequency selected by external control inputs. SO1 outputs a 33.8688MHz clock. The supported sampling frequencies are 44.1kHz and 48kHz, selected by the sampling frequency select pin (FSEL). The generated frequencies are shown in table 1. Table 1. Sampling frequency and output clock frequency FSEL LOW HIGH Sampling frequency fs 44.1kHz 48kHz Output clock frequency [MHz] SO1 33.8688 33.8688 SO2 16.9344 18.4320 SO3, SO4 22.5792 24.5760 SO5 33.8688 36.8640 Enable/Disable control A 3-wire serial interface is provided using MCK (pin 4), MLEN (pin 5), and MDT (pin 23, MDT/FSEL). Using serial control, each output frequency can be enabled (disabled when LOW) individually, or disabled to prevent unwanted output. MCK FSEL/MDT D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 MLEN Figure 3. Serial control format The 16-bit mode register (MREG) is shown in Figure 4. The name and function of each bit are shown in Tables 2 and 3. Serial control is enabled by setting D15-D10 to "011100". MREG 0 D15 1 D14 1 D13 1 D12 0 D11 0 D10 RSV CE5 D9 D8 CE4 D7 CE3 D6 CE2 D5 CE1 RSV RSV RSV RSV D4 D3 D2 D1 D0 Note: RSV is fixed LOW. Figure 4. Mode register SEIKO NPC CORPORATION --8 SM8703CV Table 2. Mode register function Bit D9 D8 D7 D6 D5 D4 D3/D2/D1/D0 Name RSV CE5 CE4 CE3 CE2 CE1 RSV Must be "LOW" SO2 output enable/disable SO3, SO4 output enable/disable SO5 output enable/disable SO1 output enable/disable MO1, MO2 output enable/disable Must be "LOW" Function Table 3. Clock output control settings (CE5 to 1) CE5 to CE1 LOW HIGH Clock output Disable (Output fixed "LOW") Enable (Default) Note The output frequency changes depending on the MDT pin function (as MDT and FSEL, the sampling frequency select signal input, share a common pin). Refer to the section "Settling Time (when the sampling frequency is changed)". MCK FSEL/MDT MREG (16bit data) MLEN ts SO2 to 5 Stable Unstable Stable Figure 5. Serial transfer timing SEIKO NPC CORPORATION --9 SM8703CV Settling Time (when the sampling frequency is changed) The output response when the frequency is changed is shown in figure 6. FSEL/MDT tS SO2 SO3 SO4 SO5 fs = 44.1kHz fs = 48kHz tS fs = 44.1kHz MO1 MO2 27.0000MHz SO1 33.8688MHz Figure 6. System clock transient timing SEIKO NPC CORPORATION --10 SM8703CV TYPICAL APPLICATION +3.3V CPU +3.3V 27MHz VDD C3 MO2 FSEL/MDT SO5 RSV SO2 VDD1 C5 27MHz VSS MO1 MCK MLEN VDDA C4 768fs 384fs VSSA XTI C1 C2 X'tal VSS1 RSV SO3 SO4 VDD2 C6 XTO RSV RSV SO1 512fs 512fs VSS2 SM8703CV 33.8688MHz I I I I Connect the decoupling capacitors (approximately 0.1F and 1000pF) in parallel, as close to the power supply pins as possible. A solid VSS pattern beneath the IC should be used to minimize noise. Master clock stability affects the stability of the other outputs. If a crystal oscillator is used, the oscillator element and load capacitors should be placed as close to the SM8703CV as possible, and connected with wires as short as possible. The crystal oscillator element and load capacitor combination has an effect on frequency accuracy, and the load capacitors (C1, C2) should be selected to match the required application. The SM8703CV outputs several high-frequency clocks, so the supply wiring pattern (including decoupling capacitors) should be considered carefully. In particular, the output supply wiring and PLL supply wiring should separated to prevent noise insertion. The output wiring capacitance should be minimized as much as possible to prevent noise. If necessary, the output clocks can be buffered. I Power supply and VSS pins. * VDD : Power supply for digital block (CPU I/F*, MO1, MO2) * VSS : VSS for digital block (CPU I/F*, MO1, MO2) * VDDA : Power supply for PLL block (XTI, XTO, PLL/VCO) * VSSA : VSS for PLL block (XTI, XTO, PLL/VCO) * VDD1 : Power supply for output block (except SO1) * VSS1 : VSS for output block (except SO1) * VDD2 : Power supply for SO1 * VSS2 : VSS for SO1 *: CPU I/F: FSEL/MDT, MLEN, MCK SEIKO NPC CORPORATION --11 SM8703CV Please pay your attention to the following points at time of using the products shown in this document. The products shown in this document (hereinafter "Products") are not intended to be used for the apparatus that exerts harmful influence on human lives due to the defects, failure or malfunction of the Products. Customers are requested to obtain prior written agreement for such use from SEIKO NPC CORPORATION (hereinafter "NPC"). Customers shall be solely responsible for, and indemnify and hold NPC free and harmless from, any and all claims, damages, losses, expenses or lawsuits, due to such use without such agreement. NPC reserves the right to change the specifications of the Products in order to improve the characteristic or reliability thereof. NPC makes no claim or warranty that the contents described in this document dose not infringe any intellectual property right or other similar right owned by third parties. Therefore, NPC shall not be responsible for such problems, even if the use is in accordance with the descriptions provided in this document. Any descriptions including applications, circuits, and the parameters of the Products in this document are for reference to use the Products, and shall not be guaranteed free from defect, inapplicability to the design for the mass-production products without further testing or modification. Customers are requested not to export or re-export, directly or indirectly, the Products to any country or any entity not in compliance with or in violation of the national export administration laws, treaties, orders and regulations. Customers are requested appropriately take steps to obtain required permissions or approvals from appropriate government agencies. SEIKO NPC CORPORATION 15-6, Nihombashi-kabutocho, Chuo-ku, Tokyo 103-0026, Japan Telephone: +81-3-6667-6601 Facsimile: +81-3-6667-6611 http://www.npc.co.jp/ Email: sales@npc.co.jp NC0113BE 2006.04 SEIKO NPC CORPORATION --12 |
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